Project TBD Memory Vault

2026-06-XX-imec-visit

21 min read

Interview: IMEC Visit (Leuven) — 2026-06-XX

Visit to IMEC HQ, Leuven. Attendees: Bliss & Dustin (TBD) + Giselle Bourgoing (clean room tour, not in this recording), Jeroen Van den Bosch (Chief of Staff, CSO), Olivier Rousseaux (Director Venture Development, brief), Annelise [last name TBD] (Olivier’s replacement, venture), Cedric Rolin (Program Director, Sustainable Semiconductor Technologies & Systems / SSTS), Ben Kaczer (Scientific Director, Advanced Reliability Robustness & Test / AR2T), Lizzie [last name TBD] (LCA researcher, SSTS team).

Source transcript: docs/Imec-transcript.txt (Deepgram Nova-3, diarized; raw audio not retained in vault). Speaker IDs in the transcript map approximately to: 0=Jeroen, 2=Bliss, 3=Ben, 4=Annelise, 5=Cedric, 7=Lizzie. Speakers 1 and 6 are mixed (Deepgram clustered similar voices together — likely Olivier, Dustin, and side-channel Cedric/Ben).

1. Play-by-play

Opening (~30 min) — informal kickoff before the agenda. Bliss opens with the Hithium / TWAICE / Munich Re analogy: battery maker offloads warranty reserves to a reinsurer, who underwrites via a digital twin built from telemetry. “How does this parallel work for GPUs?” Olivier (leaving soon) responds with his own “odometer” framing — an IMEC-invented IP block that monitors physical chip aging, originally market-researched ~2 years ago. The first hour drifts into chip repair/replacement/recycling/circular economics. Bliss had been conflating “repair” and “replacement.” Ben (who joined mid-discussion) pushes back hard: “I don’t understand what it means to repair a chip. Once a chip fails, it’s finished.” Bliss explicitly concedes the vocabulary — the workflow they care about is replacement, not repair. Lizzie talks about COVID-era European carmakers literally dumpster-diving for chips from old washing machines, and the fact that modularity (and even buyer-side knowledge of what’s inside a chip package) basically doesn’t exist.

Jeroen’s IMEC overview (~20 min, brief — he had to leave). Positions IMEC as the bridge between exotic university research and locked-in private-sector roadmaps. “Chip lab of the world.” ~10-year lead time from IMEC demo to production (TSMC nanosheet: demoed 2014, production 2024). 6,500 staff, ~€6B equipment, €1.2B budget, ~80% industrial revenue. Pre-competitive research model: companies join a program, share results until questions become competitive, then move into bilateral development-on-demand. Closes with his personal view on chip self-reliance: “the chip goes around the world 3+ times in manufacture — good luck bringing that to zero. Don’t quote me.”

Ben starts to present reliability — gets interrupted. Annelise comes back into the room about three slides in, having been asked that morning to cover Olivier’s venture slot. Ben pauses; Annelise takes the floor.

Annelise on venture (~30 min). Three IMEC business models: pre-competitive research, development-on-demand, venturing. iStart = software-accelerator wing (Y-Combinator analogue, clean room not required). iMec Ventures = deep-tech, requires clean room. Independent fund “Expansion” — Expansion I (€170M, 2017), Expansion II (€300M, 2022), Expansion III aimed for mid-2027. LPs: Flemish gov’t, EIB, IMEC, CVCs, HNW individuals. Recently shifted from spin-outs only to spin-bys — outside founders who want to leverage IMEC capabilities. Slide on European vs. US capital: ~par in early stage, “gigantic gap” at later stage; their answer is a Silicon Valley team (Roozbeh Parzar, Boston; three in SV). On TBD: Bliss explicitly asked whether a software/financial-infra wedge in the semi supply chain fits. Annelise: “you could benefit from our network. Not for the clean room — but for the insights.” Soft yes. Said to “ask Olivier again later” for what spin-offs commonly suffer from. Had to leave twice for an accidentally-rescheduled meeting.

Ben’s reliability presentation (~45 min). Department = AR2T (Advanced Reliability Robustness & Test). Physics-first view of degradation. The whole arc:

  • Why reliability matters: chip leaves fab perfect, IV curve drifts months later, designers can’t compensate.
  • Accelerated testing: can’t run experiments for 10 years, so increase voltage/temperature/stress, measure a few points, project. Whether the projection is Arrhenius vs. non-Arrhenius, linear vs. power-law vs. exponential, is literally why IRPS conferences exist.
  • Bond-energy distributions in oxide → distribution of failure times. “It’s all a probability game.” The spec is not “this chip works for 10 years” — it’s “99 out of 10,000 work for 10 years.”
  • Variability has two axes: time-zero (as-fabricated, atomic dopants distributing differently) and time-dependent (charge trapping during operation). Time-zero is a yield problem; time-dependent is reliability.
  • Workload-aware reliability is new. Old model: guarantee at 100% utilization, 125°C, for 10 years. New model: maybe my transistor only runs 10% of the time — can I get more headroom? This opens up workload-conditional guarantees.
  • Foundries publish a conservative “guaranteed operating area” in VG/VD space; IMEC characterizes the larger “safe operating area” outside it. Important for memory drivers (MRAM/RRAM) that need higher voltages.
  • Silent data corruption (SDC). Meta/Yahoo paper: 1 core in 100k CPUs intermittently miscalculates — adds two numbers, gets zero, next try gets the right answer. Software engineers can’t debug it. Ben pitched IMEC’s “system-level reliability” program — atomic models → defect → SPICE → system — as something “interesting for NVIDIA or Meta.”
  • On-chip aging monitors / odometers: ring-oscillator method (one used 99.99% of the time, one as reference; frequency delta = aging). Real. Israeli company ProteanTec is the big offering (“they’d be interesting for you — look at them”). IMEC’s contribution: tamper-aware odometers that detect if someone annealed/reset the monitor to resell a worn chip as new. Used examples: P-8 US Navy plane bought refurbished chips marked as new; counterfeit-relabeling is a real market.
  • Failure modes beyond V/T: mechanical strain (warpage during packaging), electromigration, thermal migration, stress migration. Strain modifies carrier mobility — can be measured on-chip too.

Cedric on sustainability (~40 min). SSTS program mission: “integrate IC manufacturing value chain to meet 1.5°C.” Apple is a flagship partner — came in saying “we don’t trust our suppliers’ carbon numbers, we need a baseline.” Cedric built IMEC.netzero (virtual fab model — process-step-level LCA, methodology public, partner data private). Key numbers:

  • Global emissions ~36–40 GT CO₂. ICT industry ~1.2 GT. Semi manufacturing specifically ~0.2 GT.
  • 28nm chip: 35,000 g CO₂-eq per gram of chip — same order as gold.
  • 10 years ago, operational emissions dominated. Today ~50/50 operational vs. embodied. As grid decarbonizes, embodied will dominate.
  • Areas of concern beyond carbon: PFAS, CRMs (critical raw materials → also a supplier risk), water (Taiwan/Arizona stress), waste management.
  • Chip recycling: ~0%. Volumes too big, materials nanometer-scale, recyclers crush-and-burn for gold from packaging. Exception: data center GPUs. Concentrated, documented, high-value ($100k+ racks). “Probably their better case for reduce / refurbish / repair.”
  • Sustainability ↔ resilience: upstream resource management goes hand-in-hand with economics. Only waste management is the cost center where they diverge. Bringing supply chain closer also decreases scope-3 — sustainability sells the resilience case for free.
  • On data sharing: sustainability is one of the few areas in semi where collaboration genuinely works. Apple-style customer pressure + CSRD work better than mandatory product-level reporting (which got pushed back at EU level — “Draghi report. Competitiveness is the new religion.”).

Lab tour + final Q&A with Ben (~20 min). Ben walks Bliss to the AR2T lab, escorts him out. Discussion centers on: how aging is measured (probe stations in lab; ring-oscillator differential on-chip in production), whether ML models exist for failure prediction (“there’s a paper from Intel, look at ProteanTec”), and the data-trust angle. Bliss raises an important point of his own: insurance buyers won’t trust manufacturer-reported telemetry — it has to be a third party. Ben agrees.

2. Main themes / synthesis

(a) The chip-level digital-twin substrate already exists. ProteanTec sells the on-chip telemetry IP. Aging monitors (ring-oscillator differentials, temperature, voltage, frequency) ship on real chips today. Ben confirmed NVIDIA-class chips “are aware of their temperature, voltage, frequency, and I believe they have aging monitors.” The data layer for a Munich Re / TWAICE analogue is not hypothetical — it’s already there.

(b) The right unit of analysis is “fleet-level statistical guarantee,” not “this chip will live N years.” Ben repeatedly: failure is a probability tail, never a point. Foundries already sell guarantees structured as “99/10,000 work for 10 years.” That’s the natural shape for a parametric financial product — coverage triggered when the actual failure distribution exceeds the modeled distribution, not when any specific chip fails.

(c) Repair ≠ replacement. Only replacement is real. Ben killed the “chip repair” framing. The workflow worth building around is: detect aging → trigger advance replacement → second-life-grade the removed unit (if not actually failed) → resell into tier-2/tier-3 data centers. Lizzie & Cedric independently confirmed there’s no individual-chip recycling worth chasing outside the GPU/datacenter case.

(d) Workload-conditional reliability is the unlock. “Operating at 10% utilization” should command a different warranty than “100% utilization at 125°C.” Ben says the industry is just now starting to design around this. A financial product can price on workload telemetry that already exists.

(e) Sustainability is a Trojan horse for data sharing. Cedric and Lizzie both: sustainability is the one domain where industry collaboration on data is actually working, driven by Apple-style customer pressure and CSRD reporting requirements. If the warranty product needs data that suppliers won’t otherwise share, embedding it in a sustainability-linked LCA framing may get further than asking directly.

(f) The buyer-side wins on extended life; the seller-side loses revenue. Cedric: “the idea will be especially appealing to hyperscalers… they’ll push NVIDIA for it.” NVIDIA’s narrow incentive is to replace chips as fast as possible. So the warranty product should be sold to hyperscalers and secondary-market operators — with NVIDIA participating as data provider, not the customer.

(g) Silent data corruption is an underserved failure class. SDC is a recent, real, expensive phenomenon (Meta/Yahoo paper). It’s not covered by current MTTF specs. A warranty/insurance product that explicitly covers SDC risk could be genuinely novel.

3. Warranty-workflow implications

Rule OUT (or weaken)

  • “Chip repair” as a workflow. Ben unambiguous: once a chip fails it’s done. Stop saying “repair.” The vocabulary correction matters because most of our outside framings (including the Munich Re pitch) have used “repair/replacement” interchangeably. Replacement-with-second-life-grading is the actual workflow.
  • Consumer-chip secondary markets / recycling. Both Lizzie and Cedric independently: consumer-chip recycling is hopeless (volumes huge, materials scattered, knowledge fragmented). Don’t pitch this. Stay tightly scoped to enterprise GPUs/accelerators.
  • Regulation-driven mandatory data sharing. EU is actively rolling back product-level disclosure rules (CSRDD retracted, Digital Product Passport stalled). Don’t bet the wedge on a regulatory tailwind. Aligns with compliance_wedge_killed.
  • Deterministic individual-chip failure prediction. Ben three times: it’s a distribution game with a tail. We can sell better distributions — not certainty.

Rule IN / strengthen

  • Hyperscaler-side product, with NVIDIA as data/underwriting partner — not NVIDIA-as-customer. This flips the original framing. Hyperscalers pay $200k/GPU and want every month of postponement; NVIDIA’s narrow self-interest is the opposite.
  • Tightly scoped to data-center accelerator GPUs/TPUs. Cedric specifically called this out as the one chip case where circularity makes economic sense. Use this as the demo wedge.
  • Independent third-party data layer is non-negotiable. Bliss raised it spontaneously; Ben agreed. Insurance buyers won’t trust manufacturer-reported telemetry. ProteanTec-style independent on-chip monitoring is the underwriting substrate.
  • Embed in a sustainability framing where possible. Cedric’s resilience-as-sustainability narrative gives political cover for data sharing that wouldn’t fly under a “warranty/insurance” framing.

New ideas / pivots to consider

  • “Carfax for used GPUs” — secondary-market grading service for second-hand data-center GPUs using on-chip aging-monitor data. Olivier and Cedric both flagged tier-2/tier-3 data centers as the natural buyers. Independent third party → trusted underwriting → unlocks the secondary market that everyone says should exist but doesn’t yet.
  • SDC-specific insurance product. Silent data corruption is a recent, real failure class not covered by MTTF. Could be the failure-class that justifies a new financial-product structure.
  • Workload-conditional warranty. Price coverage on actual telemetry (utilization, temp, V/F over time), not nameplate. Closer to telematics-based auto insurance than parametric weather insurance. Note that this requires the chip-aging data, which ProteanTec sells.
  • Joint IMEC + TBD pitch on system-level reliability to NVIDIA/Meta. Ben explicitly named NVIDIA and Meta as candidate customers for his SLR program. IMEC has the atomic-to-system physics. TBD could bring the operational/financial framing. Worth scoping.
  • Onshore-repair-line software layer. NVIDIA’s Dallas repair-line buildout is real. The orchestration layer (emails-and-spreadsheets today, per Bliss’s pitch) is the picks-and-shovels wedge that doesn’t require chip-level expertise — and Annelise hinted this kind of software/financial-infra wedge is exactly what iStart-adjacent collaboration might support.

4. Scraps (for scrap-pile)

  • [Reliability is a probability game] — “It’s all a probability game… the spec is not ‘we guarantee 10 years.’ The spec is, for example, 99 out of 10,000 will actually work for 10 years.” Source: Ben Kaczer, IMEC AR2T, 2026-06-XX.
  • [On-chip odometers exist and are widely deployed] — ProteanTec (Israeli) sells aging-monitor IP; Intel and IBM have papers; ring-oscillator differential is the standard method. Source: Ben Kaczer.
  • [Tamper-aware odometer] — IMEC has work on detecting odometer reset/annealing for counterfeit-chip detection. P-8 Navy plane is the canonical case. Source: Ben Kaczer.
  • [Silent data corruption is a known recent phenomenon] — Meta/Yahoo paper documents core-level intermittent miscalculation in 100k-CPU fleets. Currently untreated by MTTF specs. Source: Ben Kaczer.
  • [Chip “repair” is dead — only replacement] — “Once a chip fails it’s finished. I don’t recognize this scenario you describe with NVIDIA — the h100 cannot be repaired once it shows signs of failure.” Source: Ben Kaczer.
  • [Data center GPUs are the one chip-circularity case] — “Probably their better case for reduce / refurbish / repair. Concentrated, documented, high-value. $100k+ racks.” Source: Cedric Rolin, IMEC SSTS, 2026-06-XX.
  • [28nm chip = 35kg CO₂-eq per gram of chip] — Same order of magnitude as gold. Mass-manufactured object with the highest embodied footprint on the planet. Source: Cedric Rolin / IMEC.netzero.
  • [Operational vs. embodied has crossed over] — 10 years ago operational dominated. Today ~50/50. Future: embodied wins as grid decarbonizes. Source: Cedric Rolin.
  • [Sustainability ↔ resilience are aligned] — “Any measure that increases lifetime of the chip means using this resource in a better way.” Onshoring/closer-to-soil repair improves BOTH resilience AND scope-3 emissions. Source: Cedric Rolin.
  • [Apple pulled IMEC.netzero into existence] — “Apple came to us and said: we have a problem, we don’t trust our suppliers’ carbon numbers, we need a baseline.” Source: Cedric Rolin.
  • [Sustainability is the one place industry collaboration on data works] — “People always say collaboration is important. In fact they do not collaborate. In sustainability, we do.” Source: Cedric Rolin.
  • [Regulatory tailwind has reversed] — CSRDD retracted, DPP stalled, “Draghi report. Competitiveness is the new religion.” Source: Cedric Rolin.
  • [NVIDIA advance-replacement window is routinely violated] — Hyperscalers leave new units in boxes past the return window, milking the failing old one to maximize uptime. “How do we get the old unit returned quicker without these new units sitting unused.” Source: Bliss, citing NVIDIA contact.
  • [Engineering vs. business priorities at hyperscalers] — Some business units knowingly run chips to failure for uptime, ignoring engineering’s preventive-replacement recommendations. Source: Bliss, citing NVIDIA contact. Ben: “I never heard that.” (Contradiction worth pressing on in next NVIDIA conversation.)
  • [Manufacturers don’t tell buyers what’s in the package] — “They buy a certain memory but they don’t know exactly what’s in that chip. Sometimes they ask us: can you identify which chip is actually inside this memory I bought.” Source: Lizzie, IMEC SSTS.
  • [COVID-era dumpster diving for chips] — European carmakers literally pulled chips out of old washing machines from dumps during 2021 shortage for basic-functionality slots. “Not in the normal practice of business.” Source: Lizzie.
  • [LCA auditors serve multiple competitors under confidentiality] — Auditing carbon footprints is a real business; one auditor often serves competing chip-material suppliers; data is not aggregated across them. Source: Lizzie.
  • [Nordic data centers replace racks on 3-year depreciation schedule] — Amazon and others rotate racks not on failure but on accounting cycle. Removed equipment is increasingly being bought by tier-2/tier-3 secondary-market operators. Source: Olivier (early portion), citing Swedish professor VOC interview ~2024.
  • [Tier-2/tier-3 secondary GPU market exists] — “A secondhand market for GPUs in tier-two and tier-three data centers. Before they trash all this actually-functional material, they need to test it and put it on the secondhand market.” Source: Cedric Rolin.
  • [Workload-conditional reliability is a recent shift] — Old model: guarantee 100% utilization, 125°C, 10 years. New model: workload-aware guarantees. Source: Ben Kaczer.
  • [Foundry vs. safe operating area] — Foundries publish conservative VG/VD envelope; real safe area is larger but uncharacterized. IMEC characterizes it for designers (esp. memory drivers). Source: Ben Kaczer.

5. Tone / read-the-room

Net: warm, intellectually generous, highly engaged at the individual level — despite logistical chaos. Multiple people stayed past their hard stops. Ben gave Bliss a personal lab tour at the end, walked him out, and ended with “you have to promise you let us know what comes out of your work.” Cedric pulled out his email address on a public slide and offered to send reports. Annelise — the most rushed and least prepared (literally given Olivier’s presentation that morning) — still made a soft but clear opening for collaboration: “you could benefit from our network.”

Some hesitations worth noting:

  • Ben never explicitly endorsed the warranty/insurance market. He listened, engaged technically, but kept redirecting toward ProteanTec (“look at them, look at them”) — which reads either as “this is already being done, don’t reinvent it” or as a polite deflection from the financial-product framing he doesn’t have a model for. Possibly both. Ben said upfront, with charming bluntness: “I don’t have much business background, be prepared for a more technical presentation.”
  • The room kept drifting away from warranty into sustainability/circularity/process physics. Bliss had to actively steer back (“anchor the discussion around two questions…”) at least twice. Signal that the warranty-financial-product framing isn’t IMEC’s native language — they’re a research org, and they think in physics + materials + ecosystem-level claims. That doesn’t mean they won’t partner. It does mean a pitch to IMEC would have to be re-framed (likely through Annelise’s venture team, not Ben or Cedric directly).
  • Bliss’s own caveat on credibility landed well, but cost some authority. “Neither of us have a material science or electrical engineering background.” Annelise’s response was generous (“you build a software company that services these deep-tech firms”) but the moment functionally reframed TBD’s positioning for the rest of the conversation: from “potential peer/partner” to “interesting outsiders” who might benefit from IMEC’s network. Not necessarily wrong — but worth knowing.
  • Olivier left early. He was scheduled for the main venture conversation and instead handed off to a less-prepared substitute. The fact that he sent Annelise rather than rescheduling is a positive signal of intent, but the energy in that slot was lower than it might have been with him. Worth re-engaging Olivier directly for the SV follow-up.
  • Jeroen’s “don’t quote me” closing on self-reliance is interesting — he was explicit that the “chip onshoring” political narrative is unrealistic at affordable cost. A signal that, despite IMEC’s role in EU CHIPS Act / Flemish-government funding, the senior strategy people there view onshoring more skeptically than the public-facing positioning suggests. Worth filing.

Overall: this was a genuinely warm “we want to keep talking” visit. Not a “we want to invest” or “we want to commercialize this with you” visit. The right follow-up posture is: stay in touch, share findings as the wedge sharpens, leverage their network — not an immediate ask for partnership or pilot.

6. New companies / people to track

Companies

  • ProteanTec (Israeli) — on-chip aging-monitor IP. Almost certainly central to whatever we build. Ben referenced them ~5+ times. Visited IRPS conference recently.
  • IC Link — mentioned in passing by Cedric: “They must offer some sort of warranty. I wonder what’s the deal there.” Worth checking.
  • PDF Solutions — Bliss flagged they’ve spoken with CTO Andrzej Strojwas. Ben: “we visited them once a long time ago, we spoke with Tomasz Brożek.” PDF does fab-equipment monitoring but not in-production chip telemetry. Possible collaborator or competitor depending on positioning.
  • Apple (semi sustainability program partner) — drove IMEC.netzero into existence. Surprising data point: Apple is a serious force behind chip-supply-chain LCA standardization.
  • Hithium / TWAICE / Munich Re (already known) — Bliss’s anchoring analogy, used productively here.
  • Fraunhofer / Leti — Jeroen positioned them as IMEC’s European peers, but specialized in packaging and sensors respectively. Less relevant for the wedge but worth knowing the landscape.

People (with role + opening for outreach)

  • Ben Kaczer (Scientific Director AR2T, IMEC) — reliability physics depth, walked Bliss to the lab, asked for outputs. Open door for technical follow-up. Background: physics PhD, MOS at Tokyo, IMEC for 17 years.
  • Cedric Rolin (Program Director SSTS, IMEC) — sustainability + system-level supply-chain view. Said “email me anytime.” French-speaking Belgian. Generous, philosophical (the “around-the-beer discussion” line). Open door for sustainability angle.
  • Annelise [last name TBD] (iMec Ventures, replacing Olivier) — venture, willing to keep talking, suggested SV follow-up. Said her view is incomplete; defer detailed venture questions to Olivier.
  • Olivier Rousseaux (Director Venture Development, IMEC) — left early, but the original lead venture contact. Bliss should re-engage him directly (probably via email).
  • Jeroen Van den Bosch (Chief of Staff, CSO) — strategic-level conversations, gave email. Less likely to be operationally relevant but a good top-of-house contact.
  • Lizzie [last name TBD] (LCA researcher, SSTS team) — co-leads Semi industry circularity working group. Direct connection to the materials-side circularity ecosystem. Cedric’s team.
  • Roozbeh Parzar (iMec Ventures Boston, health/medtech focus) — referenced; not directly relevant but worth knowing the SV team has a Boston node.
  • Andrzej Strojwas (CTO, PDF Solutions) — known to both Bliss and Ben. Mutual contact, useful triangulation.
  • Tomasz Brożek (PDF Solutions, per Ben) — Ben’s contact there. Worth knowing.
  • Jillian Manos (Stanford / Shield Capital / EIC adviser) — already in TBD’s orbit; mentioned in passing as a possible connector.
  • Swedish professor (unnamed) — interviewed by Olivier in ~2024 on Nordic data-center rack rotation. Ask Olivier for the name; would be a strong VOC re-interview.

Immediate (this week)

  1. Thank-you emails — separately to Cedric, Ben, Annelise, Jeroen. Each one personalized to what they offered. Cedric’s especially should include “we’d love to read the IMEC.netzero report you mentioned.” Ben’s should include the specific commitment “we’ll send what comes out of our work.” winning-writing rules apply — these are warm follow-ups, share something, one ask.
  2. Re-engage Olivier directly — short note acknowledging his send of Annelise, asking for ~30 min when we’re in SV. Annelise told us to ask him about spin-off common failure modes; that’s a natural opening.
  3. Reach out to ProteanTec. This is the most important single follow-up. Cold outreach to founders/BD, framing: “we’re building a warranty/insurance product layer that could sit on top of your monitoring IP.” Their existing customer relationships are the fastest way into NVIDIA-side conversations on aging telemetry. Ask Ben for an intro if he has one.
  4. Update the scrap-pile with the items in §4. Several of these (SDC, tamper-aware odometers, 35,000:1 carbon ratio, Apple→IMEC.netzero origin story, hyperscaler-violates-replacement-window) are juicy raw material for synthesis docs.

Near-term (next 2 weeks)

  1. Vocabulary cleanup pass on existing TBD framing. Stop saying “chip repair.” Standardize on “advanced replacement” + “second-life grading.” This affects the Munich Re analogy doc, the warranty wedge memo, any outreach drafts in flight.
  2. Pressure-test the hyperscaler-buyer-side hypothesis. Cedric flagged “the idea will be especially appealing to hyperscalers.” The next round of interviews should include AWS/Azure/Meta/Google Cloud procurement or fleet operations, not (only) chip designers.
  3. Re-frame the wedge memo around silent data corruption as a candidate anchor failure class. SDC has the property of being novel, expensive, and not covered by current MTTF specs — exactly the gap a new financial product would fill.
  4. Ask Olivier for the Swedish-professor contact — his ~2024 VOC interview on Nordic 3-year rack-rotation is directly load-bearing for the secondary-market wedge.
  5. Look up the Meta/Yahoo SDC paper Ben referenced. Should anchor the SDC framing if we run with it. Likely “Cores that don’t count” (Hochschild et al., Google, HotOS 2021) or a Meta follow-up — find the actual cite.

Medium-term (1–2 months)

  1. Scope a joint pitch with IMEC’s system-level reliability program. Ben explicitly named NVIDIA and Meta as the audience. We’d bring the operational/financial product framing; they bring the physics-to-system modeling. Could be a small joint paper, a co-branded thesis, or a co-developed pitch deck. Run this through Annelise first (venture team is the right interface for IMEC-side commercial conversations).
  2. Investigate IC Link warranty offering. Throwaway comment from Cedric but specific enough to be worth a Google + 30 min dig.
  3. Decide whether sustainability framing should ride alongside the warranty wedge in customer-facing materials. Cedric’s “resilience-as-sustainability sells data” insight is a genuine strategic choice point — not obviously the right move (could dilute the warranty pitch) but should be a conscious decision rather than drift.

Source: in-person visit to IMEC HQ, Leuven (date TBD — placeholder XX in filename). Transcript at docs/Imec-transcript.txt (Deepgram Nova-3 diarized, 2,137 utterances). Raw audio not retained in vault — see 2026-06-XX-imec-visit for context and re-upload procedure if re-transcription needed.

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