EE 292P: Atoms, Bits, and National Interest (Jan 13)
Attendees: Dustin J Ross Date: January 13, 2026 Type: Class Session
Summary
Course Schedule & Upcoming Speakers
- Next week (Jan 20): Semiconductor technology at transistor level
- Mark Johnson (K University) - only chief semiconductor officer in US academia
- Paired with Garo from Applied Materials/Intel on industry perspective
- Jan 27: Computing focus
- Tom Lee presenting on 75th anniversary of transistor invention
- CS department researchers on “intelligence per watt” paper (Chris Ray, John Hennessy, Azalim, Hosseini)
Power Consumption Crisis in AI/Computing
- Google electricity usage surge: 12 TWh (2019) → 24 TWh (2023) → 30 TWh (2024)
- 3x increase driven by AI adoption
- Estimated $7B annual electricity cost at residential rates
- Data centers get ~50% discount, still billions in operational costs
- Training cost comparison (GPT-4 vs Grok-4):
- Development: $100M vs $500M (5x increase)
- Energy: 52M kWh vs 310M kWh (6x increase)
- Newer chips likely more efficient per operation
Material Solutions for Power Efficiency
- Current cooling limitations: ~100W/cm² without liquid cooling
- Advanced materials being explored:
- Gallium nitride (GaN) for power delivery/electrification
- Diamond for heat transfer pathways
- Carbon nanotubes (past research)
- Key insight: Moving bits costs more energy than computing
- 8-bit add: 30 femtojoules
- Moving 1 bit 1mm: 200 femtojoules
- DRAM access: 640 picojoules
Ferroelectric Technology Breakthrough
- 2011 discovery at Nam Lab (Germany): CMOS-compatible ferroelectric material
- Hafnium oxide (HfO2) doped with zirconium - same material as current transistor gates
- Voltage scaling potential:
- Current: ~0.7V supply voltage
- Near-term: 0.5V achievable
- Theoretical: 0.3V possible
- Power scales quadratically with voltage reduction
Technical Implementation Challenges
- Variability issues with polycrystalline grains
- Each device may have different numbers of grain boundaries
- Intel solved similar issues by making hafnium oxide amorphous
- Endurance limitations for computational memory applications
- Temperature sensitivity of ferroelectric properties
- Gap between university prototypes and high-volume manufacturing
Industry Innovation Dynamics
- Example: Micron developed 3D non-volatile DRAM but shelved it
- Reason: Would cannibalize existing product sales
- Small vs large player challenges:
- Small customers + small vendors = unstable relationships
- Large customers need substantial revenue justification for new lines
- Medium-sized deals ($200M) can work with established players like Infineon
Energy Efficiency of Local vs Cloud Computing
- Communication energy costs by distance (64 bits):
- On-chip: picojoules
- DRAM access: 640 picojoules
- Wireless transmission: nanojoules (10,000x higher)
- Local processing advantages:
- Background subtraction: 100x less energy than raw transmission
- Feature extraction: 1,000x less energy
- Classification: 10,000x less energy than cloud processing
Computational Memory Applications
- Ferroelectric devices enable multiple bits per transistor
- Analog synapse capabilities for neural networks
- Content addressable memory possibilities
- Startups pursuing technology:
- Mythic: $175M recent funding, using SONOS stack
- Kepler Computing: ~$700-800M raised, Intel spinoff